1. Field of the Invention
The present invention relates to a method for forming a pattern of a photoresist film and more particularly to a method for patterning a photoresist film capable of minimizing a scattering effect of a reflective light generated upon an exposure and thereby achieving an accurate patterning of the photoresist film having a single layer structure by forming an inorganic material layer over the photoresist film, patterning the inorganic material layer and then patterning the photoresist film by use of the patterned inorganic material layer as a mask.
2. Description of the Prior Art
In fabrication of a semiconductor device, a plurality of process steps to be applied to a substrate are generally necessary. As a result, the uppermost layer on the substrate may have a severe topology at its upper surface.
Where a photoresist film is coated over a layer having a topology in fabrication of a semiconductor device with a relatively large dimension, the topology does not cause any significant affect on the fabrication of the semiconductor device. However, such a topology may cause a significant effect in fabrication of a semiconductor device with a relatively small dimension.
For example, in formation of a desired pattern on the uppermost layer on a substrate utilizing a photoresist film having a single layer structure, a notching phenomenon may occur at the photoresist film due to a scattering of light caused by a topology of a layer over which the photo resist film is coated. In order to prevent such a notching phenomenon, there have been proposed various methods for planarizing the layer over which the photoresist film is coated.
In fabrication of a semiconductor device with a high integration degree inevitably involving a topology of not less than 1 .mu.m, however, use of a photoresist film having a single layer structure still encounters the notching phenomenon caused by the severe topology of the uppermost layer even when existing planarization methods are used. As a result, it is difficult to achieve an accurate control for a critical dimension of a photoresist pattern to be formed. This results in a severe degradation in reliability and operational characteristic of the semiconductor device finally fabricated.
In order to solve the above-mentioned problem, there has been proposed a new method of controlling the critical dimension by use of a multi-layer resist process utilizing a photoresist film having a multi-layer structure including two or three layers. However, this method is complex and expensive. As a result, it is difficult to use the method for mass-production of semiconductor devices.
For this reason, various methods have also been proposed which still use a photoresist film having a single layer structure, but overcome the problem caused by the topology of the layer over which the photoresist film is coated. Most of these methods involve removing a selected surface portion of the photoresist film physically and chemically, and subsequently removing the remaining portion of the photoresist film by use of a reactive ion etch (RIE) process. As such methods, there have been known a silylation method, a contact enhancement material (CEM) technique, an anti-reflective coating (ARC) process, and an alkaline treatment.
An example of such conventional methods will now be described in detail in conjunction with FIGS. 1A to 1D.
In accordance with the illustrated method, first, a general process step for fabricating a semiconductor device is carried out, thereby sequentially forming a plurality of patterns on a substrate 1, as shown in FIG. 1A. Because of such a formation of patterns, the uppermost layer, denoted by the reference numeral 2, on the substrate 1 has a severe topology. Thereafter, a positive photoresist film 3 having a single layer structure is coated over the entire upper surface of the uppermost layer 2 so as to achieve a patterning of the uppermost layer 2.
For the patterning of the uppermost layer 2, an exposure step is carried out. That is, the photoresist film 3 is selectively exposed to light emitted from a light source (not shown) under a condition that a mask 4 is disposed between the light source and the photoresist film 3, as shown in FIG. 1B.
This exposure step will be described in more detail. The mask 4 is used to expose only a selected portion of the photoresist film 3 to light. That is, the exposure light projected onto an opaque chromium layer 5 of the mask 4 is shielded by the opaque chromium layer 5 so that a portion of the photoresist film 3 disposed beneath the chromium layer 5 is not exposed to the light. On the other hand, the exposure light projected onto a transparent quartz substrate of the mask 4 transmits through the transparent quartz substrate so that only a portion of the photoresist film 3 not disposed beneath the chromium layer 5 is exposed to the light.
In practice no light is projected onto the photoresist pattern portion disposed beneath the chromium layer 5 of the mask 4 because the chromium layer 5 shields the light. However, this photoresist pattern portion disposed beneath the chromium layer 5 is exposed to reflected light resulting from a reflection of the light transmitting through the transparent quartz substrate portion of the mask 4 not disposed beneath the chromium layer 5. That is, the light transmitting through the exposed transparent quartz substrate portion of the mask 4 is projected onto the photoresist film 3 and the uppermost layer 2 both disposed beneath the exposed transparent quartz substrate portion and then reflected by the surface of the uppermost layer 2. This reflected light is projected onto a part of the photoresist film portion disposed beneath the chromium layer 5. As a result, a latent image is formed on the photoresist film portion disposed beneath the chromium layer 5.
After completing the exposure step shown in FIG. 1B, a development is carried out, as shown in FIG. 1C. By the development, the portion of photoresist film 3 not disposed beneath the chromium layer 5 of the mask 4 is removed, thereby forming a pattern of the photoresist film 3. At this time, a part of the photoresist film portion disposed beneath the chromium layer 5 intended not to be removed, but formed with the latent image is also removed.
As a result, the pattern of photoresist film 3 has at its lower portion a width W1 smaller than a width W2 at its upper portion, as shown in FIG. 1C. In other words, the width W1 of the lower portion of the photoresist pattern is smaller than an intended width corresponding to the width of the chromium layer 5, that is, the width W2.
As shown in FIG. 1D, the photoresist pattern corresponding to the remaining portion of photoresist film 3 is then set. Using the set photoresist pattern as a mask, an exposed portion of the uppermost layer 2 is etched, thereby forming a pattern of the layer 2. The pattern of layer 2 has a width smaller than an intended width.
Thereafter, the photoresist pattern is removed to expose the pattern of layer 2.
As apparent from the above description, in accordance with the conventional method, the profile of the photoresist film is degraded because a severe light scattering phenomenon occurs at the layer having a severe topology upon the exposure. This results in a degradation in uniformity of the critical dimension control, thereby preventing a pattern with a desired dimension from being obtained. As a result, it is impossible to obtain a pattern with a critical dimension for fabrication of a highly integrated semiconductor device. This results in a degradation in resolution.